Services
Good PCB's start with good engineering.
The PCB is the main platform for all assembled electronics, and should be built with consideration for the end product. Our engineering team makes DFM (Design for Manufacture) recommendations and performs DRC (Design Rule Checks) on each PCB we build. This means we take your drawings, decide how to best build them into a PCB, and make recommendations whenever possible to save money, increase reliability, and improve yields. Good end-products come from good prototypes, and this starts with engineering.
Our DFM guidelines are readily available at your request, and our engineering staff is happy to provide lunch and learn sessions as well.
Capabilities Road Map
Standard
Technology
Advanced
Technology
Development
R&D Current
R&D Future
Capability - PWB Construction
Layer Count
10
28
> 32
> 36
> 40
Overall Board Thickness (in.)
Min. 0.025
Max. 0.275
Min. 0.025
Max. 0.275
Min. 0.025
Max. 0.300
Min. 0.025
Max. 0.300
Min. 0.025
Max. 0.300
Minimum Dielectric Thickness (mils)
2
2
--
1
1
Minimum Core Thickness (mils)
2
2
--
1
1
Maximum copper cladding weight, planes
4 oz
4 oz
--
4 oz
4 oz
Maximum copper cladding weight, signals
2 oz
3 oz
--
4 oz
4 oz
Minimum copper cladding weight - signals
3/8 oz
3/8 oz
--
3/8 oz
.25 oz
Maximum copper cladding weight, external
3 oz
3 oz
--
4 oz
4 oz
Minimum copper weight - external
.25 oz
.25 oz
--
.25 oz
.25 oz
FR-4 / Multifunctional (Tg 170, RoHs-6, no lead free)
Yes
Yes
--
Yes
Yes
Nelco 4000-13EP, Nelco 4000-13EPSI
Yes
Yes
--
Yes
Yes
Polyimide
Yes
Yes
Rogers 4350
Yes
Yes
High Tg/Td RoHS Compliant / lead free assembly compatible FR-4
Yes
Yes
--
Yes
Yes
Capability Lines / Spaces
Inner Lyr Trace / Space, (1/2 oz Cu ) (mils)
4.0 / 4.0
3.0 / 3.0
2.5 / 2.5
2.5 / 2.5
2/2
Inner Lyr Trace / Space
(1 oz Cu ) (mils)
4.0 / 4.0
3.0 / 3.0
--
3.0 / 3.0
3.0 / 3.0
Outer Layer Trace & Space
(+/- mils)
4.0 / 4.0
3.0 / 3.0
--
3.0 / 3.0
2.5 / 2.5
Capability Holes
Min. Drilled Through Via (mils) Driven by aspect ratio
8
8.0
6.0
6.0
6.0
Plated Hole size Tolerance (depends on surface finish)
(+/- mils)
2
2.0
--
3 mil spread
3 mil spread
MicroVia Holes Driven by aspect ratio
6.0
5.0
--
4
4
Max. Aspect Ratio, Min. Drilled Through Via
8:1
10:1
14:1
16:1
18:1
Max. aspect ratio, Microvias (Blind Vias)
0.5:1
0.8:1
1:1
1.2:1
1.5:1
Capability Pad Sizes
External (D = Finished Hole Dia in mils) (Except Vias)
D + 14.0
D + 12.0
Internal (D = Finished Hole Dia in mils) (Except Vias)
D + 15 0
D + 14 0
Plane Clearance (D = Finished Hole Dia in mils)
D + 25.0
D + 21.0
Capability Registration Tolerance
Solder Mask Registration (+/-)
0.003
0.002
--
0.002
0.002
Feature Size Control,
(0.5 oz copper) (+/-)
0.0005
0.0003"
--
0.00025"
0.00025"
Layer-to-Layer Registration (+/-)
0.005"
0.004"
--
0.003"
0.003"
Hole Location Tolerance (+/-)
0.003"
0.002"
--
0.002"
0.002"
Fab O.D. Dimension Tolerance
(+/-)
0.005"
0.004"
0.003"
0.004"
0.003"
Outer Layer Registration (+/-)
0.004
0.003"
--
0.003"
0.003
Flatness of Finished Board
(in. / in) %
0.010
0.5
0.005
0.25
--
0.005
0.25
0.005
0.25
Capability Impedance Control
Single Ended (+/-)
Surface 10%
Internal 10%
Surface 7%
Internal 7%
--
Surface 5%
Internal 5%
Surface 5%
Internal 5%
Edge Coupled Differential (+/-)
Surface 10%
Internal 10%
Surface 7%
Internal 7%
--
Surface 5%
Internal 5%
Surface 5%
Internal 5%
Broad Sided Coupled Differential (+/-)
Surface 10%
Internal 10%
Surface 7%
Internal 7%
--
Surface 6%
Internal 6%
Surface 5%
Internal 5%
Plating Technology
Dual Rectification (Aspect Ratio)
8:1
10:1
14:1
--
--
Plate Shut Microvias
.5:1
.75:1
1:1
1.2:1
1.5:1
Capability Surface Finish
Solder Mask Over Bare Copper (SMOBC), HASI
Yes
Yes
--
Yes
Yes
ENIG
Yes
Yes
--
Yes
Yes
Immersion Tin
Yes
Yes
--
Yes
Yes
Immersion Silver
Yes
Yes
--
Yes
Yes
OSP
Yes
Yes
--
Yes
Yes
Multiple Surface Plating /
Selective Plating
Yes
Yes
--
Yes
Yes
Capability Testing
Voltage
100v
250v
--
100-250v
100-250v
Isolation (megohms)
20
20
--
20
20
Continuity (ohms)
20
10
--
10-20
10-20
Net List Testing, Dual Access Fixtures and Flying Probe
Yes
Yes
--
Yes
Yes
Impedance, single ended
and differential
Yes
Yes
--
Yes
Yes
HI Pot
500v
1,200v
>1,500v
1,500v
>1,500v
Quality Certification
ISO 9001:2008
Certified Supplier
Yes
Yes
--
Yes
Yes
MIL P 55110
No
No
--
No
No
MIL-PRF- 31032
No
No
--
No
No
Bellcore compliant
Yes
Yes
--
Yes
Yes
ROHS compliant
Yes
Yes
--
Yes
Yes
Technology
Blind and Buried Vias
Yes
Yes
Plate Shut
Yes
Yes
MicroVia (Stacked and Un-stacked)
Yes
Yes
--
Yes
Yes
Sequential Laminated
Blind/Buried Vias
Yes
Yes
--
Yes
Yes
Minimum Plane Web Detection (Auto)
--
--
Yes
Yes
Yes
Minimum Plane Web Detection (Man)
Yes
Yes
--
--
--
3/8 and .25 Oz foil
Yes
Yes
--
Yes
Yes
.4mm BGA Technology
--
Yes
--
Yes
Yes
Controlled Depth Drilling
(& back-drilling)
Yes
Yes
--
Yes
Yes
Edge Milling (Plated and non plated)
Yes
Yes
--
Yes
Yes
Non-Conductive Filled Vias
Yes
Yes
--
Yes
Yes
Via-in-Pads Via in Pad Detection
Yes
Yes
--
Yes
Yes
Via too Close Detection
Yes
Yes
--
Yes
Yes